The original PCB was designed for low sample rate, long range transmission and long battery life.
However, these design goals have to change to accommodate for the new project specifications.
In this new PCB design revision, we will attempt to achieve:
- High Resolution (24 bits native, 22 bits effective)
- High Sampling Rate (<80sps)
- High Transmission Rate (noted in previous blog post)
Resolution
In order to achieve high resolution, the analog front end has to be carefully routed to reduce the effect of noise. For this reason, we will be using a differential Analog to Digital Converter (ADC). [Link to a paper by Microchip]
Sampling Rate
Sampling rate is limited by the speed of the ADC, data bus and internal storage medium. Sampling rates of more than 1ksps are possible, but we will be limited by the transmission rate as noted in the previous post.
Transmission Rate
Since LoRa was not designed for high transmission rate, we will be designing the new PCB around a WiFi transceiver, ESP32.
The Art of PCB Routing
When making analog or high speed designs, special care must be taken in order to reduce noise or error in the signals. There are a few things to take note of, such as isolated analog and digital planes, shielding nearby high speed digital traces etc.
We are definitely not experts in PCB layout and some research has to be done in this area. It is our goal to be able to achieve 22 effective bits of resolution or better.